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Techgoondu > Blog > Enterprise > What 1.6T Ethernet means for the future of AI
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What 1.6T Ethernet means for the future of AI

Techgoondu
Last updated: June 23, 2025 at 12:42 PM
Techgoondu
Published: June 23, 2025
10 Min Read

Brought to you by Keysight Technologies

Charles Seifert, senior product manager of platform electronics and high-speed Ethernet solutions at Keysight Technologies. PHOTO: Keysight Technologies

At the heart of every major innovation in AI and data centre architecture is one common denominator – bandwidth. As AI workloads skyrocket, the need for faster, more efficient data transfer has never been greater. That’s where 1.6 terabit (1.6T) Ethernet steps in.

Charles Seifert, senior product manager of platform electronics and high-speed Ethernet solutions at Keysight, talks about what 1.6T Ethernet really means for the future of AI, and how innovation is redefining the ways in which high-speed interconnects are tested and validated.

Q: Why is 1.6T Ethernet so crucial for the future of AI and data centres?

A: The more bandwidth we can provide, the more data can move with less delay. Keysight recently helped AT&T achieve a groundbreaking milestone in data transport by successfully transferring 1.6Tbps of data across a single wavelength over a 296km commercial long-distance fibre network route connecting Newark and Philadelphia in the U.S.

This test was carried out alongside existing live traffic on 100Gbps and 400Gbps wavelengths, effectively quadrupling the network’s speed without disrupting operations.

By reducing space and power consumption per transmitted bit by an impressive 50 per cent, this advancement offers an eco-friendlier solution for scaling network infrastructure, while setting a new record-breaking industry standard that addresses the growing demand for increasingly faster and more reliable network connectivity.

But at its core, 1.6T Ethernet is all about enabling ultra-high-speed data transfer for AI data centres – critical when split-second performance can define the success of large-scale machine learning models.

Network designers who build out graphics processing unit (GPU) clusters and hyperscale AI infrastructure want one thing – confidence. Confidence that every interconnect in their network will manage the demands of real-time AI processing with solid reliability. That confidence starts with testing.

Q: What are the biggest challenges in validating 1.6T interconnects?

A: Validating 1.6Tbps interconnects is no small task; it begins at the silicon level and requires a comprehensive approach to both electrical and optical testing.

At the core, the challenge lies in ensuring every piece of the signal chain, from the silicon that drives the signal to the optical components that transmit it, meets strict conformance and performance requirements.

This approach involves deep physical layer validation, including both electrical signal integrity and optical waveform analysis, all before a single optical transceiver is even assembled.

The work continues once these components are integrated into a 1.6T transceiver. The entire module must be recharacterized to verify bit error rate performance, forward error correction (FEC) effectiveness, and overall Ethernet compliance.

It’s not enough for the hardware to simply “work” – it has to be reliable, high-performing, and versatile enough to support various Ethernet speeds and applications across the network.

So, we purpose-built a solution designed to simulate real-world network conditions. Our Interconnect and Network Performance Tester for 1.6T Ethernet, sends traffic through the transceiver and analyzes performance at Layers 1 through 2 – including digital Layer 1 and what’s referred to as Layer 1.5 – helping network designers predict how a transceiver will perform before it’s ever deployed.

ILLUSTRATION: Keysight Technologies

By injecting traffic and measuring a wide range of parameters, we can assess a transceiver’s ability to correct errors using forward error correction (FEC).

Our system performs a specialised FEC distribution analysis, giving engineers a clear view of what we call “FEC overhead” of naturally occurring errors across 224G electrical and optical lanes.

More importantly, we calculate precise bit error ratio (BER) and frame loss ratio measurements, which tells us how close a device is to reaching failure.

This approach is not just theoretical – it’s essential, actionable insight. Whether evaluating a component for a hyperscale data center or an AI cluster, knowing how much room you have before errors impact performance can be the difference between success and surprise failure.

It’s all about insight at scale. Proactively diving deep into how a transceiver performs under real-world conditions with high-fidelity, real-time validation, helps network designers move from uncertainty to confidence at scale – which is especially critical when companies are preparing to deploy tens of thousands or even millions of ports of cutting-edge Ethernet technology across their infrastructure.

Q: How does software simplify the complex process of interconnect validation?

A: Validating high-speed interconnects, whether optical transceivers, active copper cables, or active electrical cables, has traditionally been a highly manual and time-consuming process.

The challenge has only grown with the surge of configurations driven by modern data demands, particularly AI and cloud-scale infrastructure. Engineers now face an overwhelming variety of devices to test, track, and retest, often without efficient tools to manage or automate the process.

The Interconnect Test System (ITS) software from Keysight, addresses these challenges by transforming the validation process into a streamlined, intelligent workflow.

A centralised Interconnect Library database automatically records, stores, and organises detailed test data for every interconnect. This makes it easy to revisit past results, compare across devices, and confidently manage a growing range of configurations.

The software also empowers users to create and manage automated test suites. With a few inputs through the browser-based interface, engineers can generate test scripts and execute consistent, repeatable tests across multiple setups.

This process reduces manual effort and boosts test coverage and speed, which are key advantages in both R&D and manufacturing environments.

In addition to automation, we integrated advanced measurement capabilities like BERT-inferred FEC, which is especially useful in identifying and debugging signal integrity issues in manufacturing or final assembly. These features enable teams to validate interconnect performance with speed, accuracy, and confidence, even at scale.

This approach redefines how engineers approach interconnect validation by reducing complexity, improving traceability, and enabling automation. It turns a traditionally slow and fragmented process into one that is fast, scalable and future-ready.

Q: Going forward, what other challenges will engineers face, with validating high-speed Ethernet?

A: Keysight is working with the majority of global standards bodies and manufacturers of silicon chips, optical and copper interconnects using 224Gb/s electrical lane interfaces to accelerate development of the ecosystem for 800GE and 1.6T AI network infrastructures.

Our 1.6T and 800GE hardware platforms, combined with our ITS software, enable critical interconnect performance evaluations and tremendous gains in testbed productivity.

This equips our customers with the tools they need to deploy highly stable and reliable solutions into their networks. We showcased both at the OFC Conference in San Francisco, at the beginning of April.

But already, a joint early R&D-stage demonstration by Keysight, NTT Innovative Devices and Lumentum – also at OFC 2025, has achieved a new benchmark 448Gbps optical data transmission rate per lane.

This will enable development of power-efficient 3.2T interfaces for future cloud infrastructure in data centre networks, optimised for AI and ML applications that will need ultra-fast/real-time data processing.

With continuous development, we can clearly see that a key priority for customers developing next-generation interconnects, will continue to be about having confidence in their test results.

With the increasing complexity of optical and electrical components such as transceivers, active and passive cables, switch ASICs, and serialiser/deserialiser (SerDes) silicon, it’s essential to know that measurements are accurate, repeatable, and aligned with evolving standards like IEEE and LPO MSA.

Reliable testing enables engineers to prove that their designs meet performance expectations before moving into large-scale production, where errors can be costly.

As Ethernet speed development accelerates and new standards emerge more rapidly, the need to validate components quickly and thoroughly becomes even more critical.

That is why test systems must support both physical and digital layer validation, helping teams ensure their products are functional, compliant, and production-ready.

By enabling fast, consistent, and accurate measurements across the ecosystem, these solutions help reduce risk, support faster innovation, and give manufacturers the assurance needed to scale confidently.

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TAGGED:1.6T EthernetAIAT&TCharles Seifertfibre opticsKeysight TechnologiesQ&Asponsored

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